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13 - 8
13
HMC920LP5E
v07.1013
ACTIVE BIAS CONTROLLER
Pin Number
Function
Description
Interface Schematic
13
VREF
1.5V reference voltage. 0.1uF or greater capacitor to GND
is needed for noise filtering.
14
Vdd2
Bias supply for negative voltage generator. Connect supply
voltage with appropriate filtering. Vdd2 supply voltage
should be same as Vdd1.
15
CPOUT
Negative voltage generator charge pump output. Negative
voltage generator needs a flying capacitor, a reservoir
capacitor and two diodes to operate. Please refer to the
application schematic for more info.
16
DGND
Digital ground domain (DGND).
11, 17
AGND
Analog ground domain (GND).
18
VNEGFB
Feedback (Control) pin for Negative Voltage Genera-
tor Charge Pump. Float to activate the negative voltage
generator / Sort to GND to disable the negative voltage
generator.
19
VNEGIN
Negative input to the chip. Should be supplied with CPOUT
when negative voltage generator is enabled, or connect to
external VSS when negative voltage generator is enabled.
For detailed usage please refer to the Negative Voltage
Generator section.
20
VGATEFB
Control pin for VGATEFB. Float VGATEFB when a
depletion mode transistor is biased. Selects the mode of
operation along with VNEGFB pin. For detailed usage
please refer to the Table 1. Mode Selection.
Pin Descriptions (Continued)
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